In February 2006 I designed ternary ADC module (discussed at that time
in russian topic of our forum as conversion of some binary ADC principles to ternary ADC scheme) that takes analog signal and produces 1 trit and analog error that can be connected to next ADC module to produce next 1 trit and next analog error - precision of this solution and number of possible tritness are unknown:
![Image](http://www.nedopc.org/ternary/image/img43f3f81696d55.gif)
You can see 2 op-amp, 2 comparators and 2 diodes per 1 produced trit. Scheme was tested in MULTISIM and it looks working, but in real life I think we need to add one more op-amp before ternary output to buffer it from next scheme (or simple ternary buffer with 2 bipolar transistors - PNP and NPN).