At first, it was electric diagramm with ROM as command decoder in Harvard Architecture without D-block and 2/4 ticks per operation.

But later improved to Princeton Architecture with D-block (I/O-Devices/BIOS-Drivers).

Later developed the simple Web-Emulator with Assembly/Disassembler/Debugger and i8080-Emulator for USSR-PC.
(Like Virtual Java Machine, the Koyaanisqatsi Code must to execute at i8080, z80, MOS 6502 and others…)
This architecture is currently undergoing further development attempts, implying high flexibility and up to hundreds ticks per operation.
However, the author experiences difficulties, since there is no special experience in developing architecture from scratch, and improvisation takes a lot of time.
Some difficulties are presented by processing the chain of prefixes, the number of which is conditionally unlimited before the command. Also, prefixes can encode both a vector per cell in memory, and set a special mode of command operation.
There are outlines of algorithms for translating Koy-code into a JavaScript listing.