nedoPC.org

00     - NOP (0 or 1 cycle)
01..7F - A=n copy instruction to A (0 or 1 cycle)
80..87 - RST n (special case): prepare F' & G' and swap (0 or 1 cycle)
88..BE - R1=R2 if R1 and R2 are the same then store incremented value (0 or 1 cycle)
BF     - RET (special case): swap + skip (1 cycle)
C0..DF - fast ALU (1 cycle):  110xxxxx
E0..FF - slow ALU (2 cycles): 111xxxxx

1st stage:

     /OE
000 - 1 updated PC at this point (/CE=0 all the time)
001 - 1
010 - 1
011 - 1
100 - 0
101 - 0
110 - 0 strobe instruction store / execute simple instructions (A=n, R=~R, R1=R2, RST n) + store
111 - 1 strobe PC increment / store instruction for 2nd stage

2nd stage - fast ALU function execution (RRC,RLC,NAN,XOR):

      DMUX
000 - 1 connect 1st nibble
001 - 1
010 - 1 strobe accumulator store (1st nibble) / flags
011 - 2 connect 2nd nibble
100 - 2
101 - 2 strobe accumulator store (2nd nibble) / flags
110 -
111 -

2nd stage - slow ALU function execution (ADC,SBC,ADI,SBI):

000 - 1 connect 1st nibble
001 - 1
010 - 1
011 - 1
100 - 1
101 - 1 strobe accumulator store (low nibble) / flags
110 -
111 -

000 - 2 connect 2nd nibble
001 - 2
010 - 2
011 - 2
100 - 2
101 - 2 strobe accumulator store (high nibble) / flags
110 -
111 -

            _________________
/RST ______|
     ______   _   _   _   _
CLK        |_| |_| |_| |_| |_  6.666 MHz
     ______     ___     ___
CLK1       |___|   |___|   |_  3.333 MHz
     ______         _______
CLK2       |_______|       |_  1.666 MHz

           .       .       .
     __________             _
/OE            |___________|   450 ns
           .        ___    .
REGRD _____________|   |_____  150 ns
           .       .    ___
REGWR _________________|   |_  150 ns
           | 300ns | 300ns |
           ^           ^
           |   450ns   |
           |           \data ready
           \address ready

1st stage:

    /OE
00 - 1 updated PC at this point (/CE=0 all the time)
01 - 0
10 - 0 strobe execute simple instruction (A=n, R=~R, R1=R2, RST n)
11 - 0 strobe result store (higher priority for accumulator) and PC increment (if enabled)

2nd stage - fast ALU function execution (RRC,RLC,NAN,XOR):

     DMUX
00 - 1 connect 1st nibble
10 - 1 strobe accumulator store (1st nibble) / flags
10 - 2 connect 2nd nibble
11 - 2 strobe accumulator store (2nd nibble) / flags

2nd stage - slow ALU function execution (ADC,SBC,ADI,SBI):

00 - 1 connect 1st nibble
01 - 1
10 - 1
11 - 1 strobe accumulator store (low nibble) / flags

00 - 2 connect 2nd nibble
01 - 2
10 - 2
11 - 2 strobe accumulator store (high nibble) / flags